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FUSiONSEMICONDUCTOR
Careers

Do the hard blocks, with people who have done them before

We hire engineers who care about why a layout works, not just whether it passes. Every new starter is paired with a senior engineer from week one.

Life at Fusion

Mentoring is part of the job, not an afterthought

Our senior engineers spend real time in review with junior staff. That is how twenty years of layout judgment actually transfers.

  • Advanced-node project exposure from day one
  • Structured mentoring from 20-year veterans
  • Sponsored tool and methodology training
  • Flexible and hybrid working arrangements
  • Global project rotation opportunities
  • Performance-linked rewards
Glowing circuit interconnect across a silicon wafer
Open Positions

Roles we are hiring for right now

  • Own block to full-chip analog layout on advanced nodes and mentor junior layout engineers.

    Apply for this role
  • Layout of RF front-end blocks with EM verification of passive structures up to mmWave bands.

    Apply for this role
  • RTL-to-GDSII implementation with timing, power and physical closure on FinFET nodes.

    Apply for this role
  • Build SKILL and Python automation that removes repetitive effort from custom layout flows.

    Apply for this role
  • Structured 12-month training program covering PDKs, matching, verification and tapeout.

    Apply for this role

Nothing matching your experience?

We keep strong layout and physical design profiles on file and reach out when a program opens. Send us your CV and tell us what you want to work on.

career@fusion-semi.com